chapter 13

Computer Arithmetic

and

Verilog HDL Fundamentals

Chapter 13

Floating-Point Subtraction

Verilog Code Figures

Page 585, Figure 13.8

//behavioral floating-point subtraction

//true addition: fract_a < fract_b or fract_a > fract_b

module sub_flp2 (flp_a, flp_b, sign, exponent,

                     exp_unbiased, rslt);

input [31:0] flp_a, flp_b;

output sign;

output [7:0] exponent, exp_unbiased;

output [22:0] rslt;

//variables used in an always block are declared as registers

reg sign_a, sign_b;

reg [7:0] exp_a, exp_b;

reg [7:0] exp_a_bias, exp_b_bias;

reg [22:0] fract_a, fract_b;

reg [7:0] ctr_align;

reg [22:0] rslt;

reg sign;

reg [7:0] exponent, exp_unbiased;

reg cout;

//=========================================================

//define sign, exponent, and fraction

always @ (flp_a or flp_b)

begin

      sign_a = flp_a[31];

      sign_b = flp_b[31];

      exp_a = flp_a[30:23];

      exp_b = flp_b[30:23];

      fract_a = flp_a[22:0];

      fract_b = flp_b[22:0];

//bias exponents

      exp_a_bias = exp_a + 8'b0111_1111;

      exp_b_bias = exp_b + 8'b0111_1111;

//align fractions

      if (exp_a_bias < exp_b_bias)

         ctr_align = exp_b_bias - exp_a_bias;

         while (ctr_align)

            begin

               fract_a = fract_a >> 1;

               exp_a_bias = exp_a_bias + 1;

               ctr_align = ctr_align - 1;

            end

      if (exp_b_bias < exp_a_bias)

         ctr_align = exp_a_bias - exp_b_bias;

         while (ctr_align)

            begin

               fract_b = fract_b >> 1;

               exp_b_bias = exp_b_bias + 1;

               ctr_align = ctr_align - 1;

            end

//==========================================================

//obtain rslt

         {cout, rslt} = fract_a + fract_b;

         sign = sign_a;

//postnormalize

      if (cout == 1)

         begin

            {cout, rslt} = {cout, rslt} >> 1;

            exp_b_bias = exp_b_bias + 1;

         end

         exponent = exp_b_bias;

         exp_unbiased = exp_b_bias - 8'b0111_1111;

end

endmodule

//test bench for floating-point subtraction

module sub_flp2_tb;

reg [31:0] flp_a, flp_b;

wire sign;

wire [7:0] exponent, exp_unbiased;

wire [22:0] rslt;

//display variables

initial

$monitor ("sign = %b, exp_biased = %b, exp_unbiased = %b,

               rslt = %b",

            sign, exponent, exp_unbiased, rslt);

//apply input vectors

initial

begin

         //(-19) - (+25) = -44

         //          s ----e---- --------------f-------------

   #0    flp_a = 32'b1_0000_0101_1001_1000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0101_1100_1000_0000_0000_0000_000;

         //(-22) - (+28) = -50

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0101_1011_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0101_1110_0000_0000_0000_0000_000;

         //(-16) - (+23) = -39

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0101_1000_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0101_1011_1000_0000_0000_0000_000;

         //(-13) - (+54) = -67

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0100_1101_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0110_1101_1000_0000_0000_0000_000;

         //(-40) - (+24) = -64

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0110_1010_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0101_1100_0000_0000_0000_0000_000;

         //(+34) - (-11) = +45

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0110_1000_1000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0100_1011_0000_0000_0000_0000_000;

       //(+16) - (-42) = +58

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0101_1000_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1010_1000_0000_0000_0000_000;

         //(-86) - (+127) = -213

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1010_1100_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         //(-127) - (+76) = -202

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1111_1100_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1001_1000_0000_0000_0000_000;

         //(-127) - (+76) = -203

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1001_1000_0000_0000_0000_000;

         //(+76) - (-127) = +203

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1001_1000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         //(+127) - (-77) = +204

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1001_1010_0000_0000_0000_000;

   #10   $stop;

end

//instantiate the module into the test bench

sub_flp2 inst1 (

      .flp_a(flp_a),

      .flp_b(flp_b),

      .sign(sign),

      .exponent(exponent),

      .exp_unbiased(exp_unbiased),

      .rslt(rslt)

      );

endmodule

Page 590, Figure 13.11

//behavioral floating-point subtraction

//true subtraction: fract_a < fract_b, sign_a=sign_b

module sub_flp7 (flp_a, flp_b, sign, exponent,

                     exp_unbiased, rslt);

input [31:0] flp_a, flp_b;

output sign;

output [7:0] exponent, exp_unbiased;

output [22:0] rslt;

//variables used in an always block are declared as registers

reg sign_a, sign_b;

reg [7:0] exp_a, exp_b;

reg [7:0] exp_a_bias, exp_b_bias;

reg [22:0] fract_a, fract_b;

reg [7:0] ctr_align;

reg [22:0] rslt;

reg sign;

reg [7:0] exponent, exp_unbiased;

reg cout;

//=========================================================

//define sign, exponent, and fraction

always @ (flp_a or flp_b)

begin

      sign_a = flp_a[31];

      sign_b = flp_b[31];

      exp_a = flp_a[30:23];

      exp_b = flp_b[30:23];

      fract_a = flp_a[22:0];

      fract_b = flp_b[22:0];

//bias exponents

      exp_a_bias = exp_a + 8'b0111_1111;

      exp_b_bias = exp_b + 8'b0111_1111;

//align fractions

      if (exp_a_bias < exp_b_bias)

         ctr_align = exp_b_bias - exp_a_bias;

         while (ctr_align)

            begin

               fract_a = fract_a >> 1;

               exp_a_bias = exp_a_bias + 1;

               ctr_align = ctr_align - 1;

            end

      if (exp_b_bias < exp_a_bias)

         ctr_align = exp_a_bias - exp_b_bias;

         while (ctr_align)

            begin

               fract_b = fract_b >> 1;

               exp_b_bias = exp_b_bias + 1;

               ctr_align = ctr_align - 1;

            end

//==========================================================

//obtain rslt

      if (fract_a < fract_b)

         begin

            fract_a = ~fract_a + 1;

            {cout, rslt} = fract_a + fract_b;

            sign = ~sign_a;

         end

//postnormalize

         while (rslt[22] == 0)

            begin

               rslt = rslt << 1;

               exp_b_bias = exp_b_bias - 1;

            end

      exponent = exp_b_bias;

      exp_unbiased = exp_b_bias - 8'b0111_1111;

end

endmodule

//test bench for floating-point subtraction

module sub_flp7_tb;

reg [31:0] flp_a, flp_b;

wire sign;

wire [7:0] exponent, exp_unbiased;

wire [22:0] rslt;

initial              //display variables

$monitor ("sign=%b, exp_biased=%b, exp_unbiased=%b, rslt=%b",

            sign, exponent, exp_unbiased, rslt);

initial              //apply input vectors

begin

         //(-60) - (-127) = +67

         //          s ----e---- --------------f-------------

   #0    flp_a = 32'b1_0000_0110_1111_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         //(+11) - (+34) = -23

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0100_1011_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0110_1000_1000_0000_0000_0000_000;

         //(-23) - (-36) = +13

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0101_1011_1000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1001_0000_0000_0000_0000_000;

         //(-7) - (-38) = +31

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0011_1110_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1001_1000_0000_0000_0000_000;

         //(+127) - (+255) = -128

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b0_0000_1000_1111_1111_0000_0000_0000_000;

         //(+47) - (+72) = -25

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0110_1011_1100_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1001_0000_0000_0000_0000_000;

   #10   $stop;

end     

//instantiate the module into the test bench

sub_flp7 inst1 (

   .flp_a(flp_a),

   .flp_b(flp_b),

   .sign(sign),

   .exponent(exponent),

   .exp_unbiased(exp_unbiased),

   .rslt(rslt)

   );

endmodule

Page 594, Figure 13.14

//behavioral floating-point subtraction

//true subtraction: fract_a < fract_b, sign_a!=sign_b

module sub_flp8 (flp_a, flp_b, sign, exponent,

                     exp_unbiased, rslt);

input [31:0] flp_a, flp_b;

output sign;

output [7:0] exponent, exp_unbiased;

output [22:0] rslt;

//variables used in an always block are declared as registers

reg sign_a, sign_b;

reg [7:0] exp_a, exp_b;

reg [7:0] exp_a_bias, exp_b_bias;

reg [22:0] fract_a, fract_b;

reg [7:0] ctr_align;

reg [22:0] rslt;

reg sign;

reg [7:0] exponent, exp_unbiased;

reg cout;

//==========================================================

//define sign, exponent, and fraction

always @ (flp_a or flp_b)

begin

      sign_a = flp_a[31];

      sign_b = flp_b[31];

      exp_a = flp_a[30:23];

      exp_b = flp_b[30:23];

      fract_a = flp_a[22:0];

      fract_b = flp_b[22:0];

//bias exponents

      exp_a_bias = exp_a + 8'b0111_1111;

      exp_b_bias = exp_b + 8'b0111_1111;

//align fractions

      if (exp_a_bias < exp_b_bias)

         ctr_align = exp_b_bias - exp_a_bias;

         while (ctr_align)

            begin

               fract_a = fract_a >> 1;

               exp_a_bias = exp_a_bias + 1;

               ctr_align = ctr_align - 1;

            end

      if (exp_b_bias < exp_a_bias)

         ctr_align = exp_a_bias - exp_b_bias;

         while (ctr_align)

            begin

               fract_b = fract_b >> 1;

               exp_b_bias = exp_b_bias + 1;

               ctr_align = ctr_align - 1;

            end

//==========================================================

//obtain rslt

      if (fract_a < fract_b)

         begin

            fract_a = ~fract_a + 1;

            {cout, rslt} = fract_a + fract_b;

            sign = ~sign_a;

         end

//postnormalize

         while (rslt[22] == 0)

            begin

               rslt = rslt << 1;

               exp_b_bias = exp_b_bias - 1;

            end

      exponent = exp_b_bias;

      exp_unbiased = exp_b_bias - 8'b0111_1111;

end

endmodule

//test bench for floating-point subtraction

module sub_flp8_tb;

reg [31:0] flp_a, flp_b;

wire sign;

wire [7:0] exponent, exp_unbiased;

wire [22:0] rslt;

initial                 //display variables

$monitor ("sign=%b, exp_biased=%b, exp_unbiased=%b, rslt=%b",

               sign, exponent, exp_unbiased, rslt);

//apply input vectors

initial

begin

         //(+36) + (-140) = -104

         //          s ----e---- --------------f-------------

   #0    flp_a = 32'b0_0000_0110_1001_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_1000_1000_1100_0000_0000_0000_000;

         //(-85) + (+127) = +42

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1010_1010_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         //(+76) + (-127) = -51

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1001_1000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         //(+25) + (-120) = -95

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0101_1100_1000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1111_0000_0000_0000_0000_000;

         //(-36) + (+48) = +12

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0110_1001_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0110_1100_0000_0000_0000_0000_000;

         //(+28) + (-35) = -7

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0101_1110_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1000_1100_0000_0000_0000_000;

         //(+11) + (-34) = -23

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0100_1011_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1000_1000_0000_0000_0000_000;

       //(-127) + (+150) = +23

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b0_0000_1000_1001_0110_0000_0000_0000_000;

         //(+127) + (-128) = -1

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b1_0000_1000_1000_0000_0000_0000_0000_000;

   #10   $stop;

end

//instantiate the module into the test bench

sub_flp8 inst1 (

      .flp_a(flp_a),

      .flp_b(flp_b),

      .sign(sign),

      .exponent(exponent),

      .exp_unbiased(exp_unbiased),

      .rslt(rslt)

      );

endmodule

Page 598, Figure 13.17

//behavioral floating-point subtraction

//true subtraction: fract_a > fract_b, sign_a != sign_b

module sub_flp9 (flp_a, flp_b, sign, exponent,

                     exp_unbiased, rslt);

input [31:0] flp_a, flp_b;

output sign;

output [7:0] exponent, exp_unbiased;

output [22:0] rslt;

//variables used in an always block are declared as registers

reg sign_a, sign_b;

reg [7:0] exp_a, exp_b;

reg [7:0] exp_a_bias, exp_b_bias;

reg [22:0] fract_a, fract_b;

reg [7:0] ctr_align;

reg [22:0] rslt;

reg sign;

reg [7:0] exponent, exp_unbiased;

reg cout;

//=========================================================

//define sign, exponent, and fraction

always @ (flp_a or flp_b)

begin

      sign_a = flp_a[31];

      sign_b = flp_b[31];

      exp_a = flp_a[30:23];

      exp_b = flp_b[30:23];

      fract_a = flp_a[22:0];

      fract_b = flp_b[22:0];

//bias exponents

      exp_a_bias = exp_a + 8'b0111_1111;

      exp_b_bias = exp_b + 8'b0111_1111;

//align fractions

      if (exp_a_bias < exp_b_bias)

         ctr_align = exp_b_bias - exp_a_bias;

         while (ctr_align)

            begin

               fract_a = fract_a >> 1;

               exp_a_bias = exp_a_bias + 1;

               ctr_align = ctr_align - 1;

            end  

     if (exp_b_bias < exp_a_bias)

         ctr_align = exp_a_bias - exp_b_bias;

         while (ctr_align)

            begin

               fract_b = fract_b >> 1;

               exp_b_bias = exp_b_bias + 1;

               ctr_align = ctr_align - 1;

            end

//==========================================================

//obtain rslt

      if (fract_a > fract_b)

         begin

            fract_b = ~fract_b + 1;

            {cout, rslt} = fract_a + fract_b;

            sign = sign_a;

         end

//postnormalize

         while (rslt[22] == 0)

            begin

               rslt = rslt << 1;

               exp_b_bias = exp_b_bias - 1;

            end

      exponent = exp_b_bias;

      exp_unbiased = exp_b_bias - 8'b0111_1111;

end

endmodule

//test bench for floating-point subtraction

module sub_flp9_tb;

reg [31:0] flp_a, flp_b;

wire sign;

wire [7:0] exponent, exp_unbiased;

wire [22:0] rslt;

initial              //display variables

$monitor ("sign=%b, exp_biased=%b, exp_unbiased=%b, rslt=%b",

               sign, exponent, exp_unbiased, rslt);

initial                 //apply input vectors

begin

         //(+72) + (-46) = +26

         //          s ----e---- --------------f-------------

   #0    flp_a = 32'b0_0000_0111_1001_0000_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1011_1000_0000_0000_0000_000;

         //(-126) + (+25) = -101

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1111_1100_0000_0000_0000_000;

         flp_b = 32'b0_0000_0101_1100_1000_0000_0000_0000_000;

         //(+172) + (-100) = +72

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_1000_1010_1100_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1100_1000_0000_0000_0000_000;

         //(+117) + (-10) = +107

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1110_1010_0000_0000_0000_000;

         flp_b = 32'b1_0000_0100_1010_0000_0000_0000_0000_000;

         //(+127) + (-75) = +52

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1001_0110_0000_0000_0000_000;

         //(-127) + (+120) = -7

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1111_0000_0000_0000_0000_000;

         //(+135) + (-127) = +8

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_1000_1000_0111_0000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         //(-180) + (+127) = -53

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_1000_1011_0100_0000_0000_0000_000;

         flp_b = 32'b0_0000_0111_1111_1110_0000_0000_0000_000;

         //(+85.75) + (-70.50) = +15.25

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1010_1011_1000_0000_0000_000;

         flp_b = 32'b1_0000_0111_1000_1101_0000_0000_0000_000;

       //(-96.50) + (+30.25) = -66.25

         //          s ----e---- --------------f-------------

   #10      flp_a = 32'b1_0000_0111_1100_0001_0000_0000_0000_000;

         flp_b = 32'b0_0000_0101_1111_0010_0000_0000_0000_000;

   #10      $stop;

end

//instantiate the module into the test bench

sub_flp9 inst1 (

      .flp_a(flp_a),

      .flp_b(flp_b),

      .sign(sign),

      .exponent(exponent),

      .exp_unbiased(exp_unbiased),

      .rslt(rslt)

      );

endmodule

Page 603, Figure 13.20

//behavioral floating-point subtraction

//true subtraction: fract_a > fract_b, sign_a= sign_b

module sub_flp10 (flp_a, flp_b, sign, exponent,

                     exp_unbiased, rslt);

input [31:0] flp_a, flp_b;

output sign;

output [7:0] exponent, exp_unbiased;

output [22:0] rslt;

//variables used in an always block are declared as registers

reg sign_a, sign_b;

reg [7:0] exp_a, exp_b;

reg [7:0] exp_a_bias, exp_b_bias;

reg [22:0] fract_a, fract_b;

reg [7:0] ctr_align;

reg [22:0] rslt;

reg sign;

reg [7:0] exponent, exp_unbiased;

reg cout;

//==========================================================

//define sign, exponent, and fraction

always @ (flp_a or flp_b)

begin

      sign_a = flp_a[31];

      sign_b = flp_b[31];

      exp_a = flp_a[30:23];

      exp_b = flp_b[30:23];

      fract_a = flp_a[22:0];

      fract_b = flp_b[22:0];

      exp_a_bias = exp_a + 8'b0111_1111;                                                        //bias exponents

      exp_b_bias = exp_b + 8'b0111_1111;

//align fractions

      if (exp_a_bias < exp_b_bias)

         ctr_align = exp_b_bias - exp_a_bias;

         while (ctr_align)

            begin

               fract_a = fract_a >> 1;

               exp_a_bias = exp_a_bias + 1;

               ctr_align = ctr_align - 1;

            end

      if (exp_b_bias < exp_a_bias)

         ctr_align = exp_a_bias - exp_b_bias;

         while (ctr_align)

            begin

               fract_b = fract_b >> 1;

               exp_b_bias = exp_b_bias + 1;

               ctr_align = ctr_align - 1;

            end  

//==========================================================

//obtain rslt

      if (fract_a > fract_b)

         begin

            fract_b = ~fract_b + 1;

            {cout, rslt} = fract_a + fract_b;

            sign = sign_a;

         end

//postnormalize

         while (rslt[22] == 0)

            begin

               rslt = rslt << 1;

               exp_b_bias = exp_b_bias - 1;

            end

      exponent = exp_b_bias;

      exp_unbiased = exp_b_bias - 8'b0111_1111;

end

endmodule

//test bench for floating-point subtraction

module sub_flp10_tb;

reg [31:0] flp_a, flp_b;

wire sign;

wire [7:0] exponent, exp_unbiased;

wire [22:0] rslt;

//display variables

initial

$monitor ("sign=%b, exp_biased=%b, exp_unbiased=%b, rslt=%b",

               sign, exponent, exp_unbiased, rslt);

//apply input vectors

initial

begin

         //(-130) - (-25) = -105

         //          s ----e---- --------------f-------------

   #0    flp_a = 32'b1_0000_1000_1000_0010_0000_0000_0000_000;

         flp_b = 32'b1_0000_0101_1100_1000_0000_0000_0000_000;

         //(+105) - (+5) = +100

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1101_0010_0000_0000_0000_000;

         flp_b = 32'b0_0000_0011_1010_0000_0000_0000_0000_000;

         //(+72) - (+47) = +25

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0111_1001_0000_0000_0000_0000_000;

         flp_b = 32'b0_0000_0110_1011_1100_0000_0000_0000_000;

         //(-127) - (-60) = -67

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_0111_1111_1110_0000_0000_0000_000;

         flp_b = 32'b1_0000_0110_1111_0000_0000_0000_0000_000;

         //(+36.5) - (+5.75) = +30.75

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_0110_1001_0010_0000_0000_0000_000;

         flp_b = 32'b0_0000_0011_1011_1000_0000_0000_0000_000;

         //(-720.75) - (-700.25) = -20.50

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b1_0000_1010_1011_0100_0011_0000_0000_000;

         flp_b = 32'b1_0000_1010_1010_1111_0001_0000_0000_000;

         //(+963.50) - (+520.25) = +443.25

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_1010_1111_0000_1110_0000_0000_000;

         flp_b = 32'b0_0000_1010_1000_0010_0001_0000_0000_000;

         //(+5276) - (+4528) = +748

         //          s ----e---- --------------f-------------

   #10   flp_a = 32'b0_0000_1101_1010_0100_1110_0000_0000_000;

         flp_b = 32'b0_0000_1101_1000_1101_1000_0000_0000_000;

   #10   $stop;

end

//instantiate the module into the test bench

sub_flp10 inst1 (

      .flp_a(flp_a),

      .flp_b(flp_b),

      .sign(sign),

      .exponent(exponent),

      .exp_unbiased(exp_unbiased),

      .rslt(rslt)

      );

endmodule